A video RAM (VRAM), sometimes called a dual-port RAM, is a dynamic random access memory (DRAM) having a serial I/O port coupled to a serial access memory (SAM). The SAM permits a block of stored data to be rapidly accessed, in a serial fashion, independently of the normal access function of the DRAM. The information in the SAM is normally obtained from, or input into, a primary memory on the VRAM. The primary memory may be configured as a DRAM array and is accessed according to DRAM protocol.
Information may be written into the DRAM at DRAM address speeds and output through the serial access port, or vice versa. This is convenient for video applications, for example, because some address sequences, such as pixels in a raster scan are predetermined.
The serial port allows data to be accessed in sequential order by applying a rising (or falling) edge to a serial clock (SC) input pin. An internal address counter points to a location in the SAM. The SC edge increments the internal counter to the next location in the SAM, and then sends the data value stored in the accessed cell to the output port.
When a false SC clock signal occurs, for example during a read operation, the internal counter is erroneously incremented to the next location, with the result that the output port does not contain correct data. False clock signals during serial write operations cause errors as well. False clock signals typically are caused by either the noise generated by the output switching or by coupling between the SC pin and a switching output. What is needed is a way to prevent false serial clocking in a VRAM serial port without compromising device performance.